diff --git a/reduce/reduce b/reduce/reduce
new file mode 100755
index 0000000..0d1319a
Binary files /dev/null and b/reduce/reduce differ
diff --git a/roofline/report/inputs/discussion.tex b/roofline/report/inputs/discussion.tex
index 0a19393..d6ec6fc 100644
--- a/roofline/report/inputs/discussion.tex
+++ b/roofline/report/inputs/discussion.tex
@@ -1,6 +1,8 @@
 According to the definition used the arithmetic intensity is measured by operations per byte. This might not be adequat for haswell processors (and later). Due to the fused multiply-add\footnote{although called multiply-add there are 36 different slightly instructions} extension two floating point operations can be performed with a single instruction. 
 
 - worse results for 4 threads @ NUMA-STREAM not necessarily expected
+- better results for triad possibly due to combined storage in FMA
+- striding for arrays
 
 %%% Local Variables:
 %%% mode: latex
diff --git a/roofline/report/inputs/kernels.tex b/roofline/report/inputs/kernels.tex
index 09e87b3..c69863b 100644
--- a/roofline/report/inputs/kernels.tex
+++ b/roofline/report/inputs/kernels.tex
@@ -1,3 +1,115 @@
+Kernels with operational intensity (OI) of $\rfrac{1}{16}$ and $8$ have been implemented. The kernels are introduced in the following sections.
+
+However the effective operational intensity of a given kernel in a high-level language (as C) is not obvious when compiled to processor instructions. Furthermore, due to today's advanced processor architecture, adaptions had to be made to account for special capabilites. This resulted in several different kernels. Not all of them are machine independent with regard to operational intensity.
+
+All kernels were compiled with \verb|gcc 5.3.1| and different options. The compilation was checked with \verb|objdump -d -M intel-mnemonics|. For a more elaborate analysis of the disassembly on the testers computer, please refer to the header file \verb|aikern.h| that should come with this report. Additionally \verb|Makefile| provides all informations about the used and tested compiler options.
+
+Good results\footnote{all, including the special FMA kernels, use only expected memory access, doing everything else in registers} were achieved with \verb|-O2 -mavx -mfma|. But \verb|-O2 -maxv -mfma| is a tradeoff between the best possible results and obviously correct compiled code. In fact the assembly almost looks like handwritten. If even more optimization is wanted \verb|-O3| can be used. To fully utilize FMA with packed doubles \verb|-Ofast| or \verb|-Ofast -ffast-math| has to be used. Be aware that more optimization than \verb|-O2 -maxv -mfma| results in a very hard to understand disassembly. \verb|-ffast-math| can even introduce rounding errors. It is not completely obvious that the highly optimized compiled code still has the wanted operational intensity. \verb|-O0| never works out.
+
+\bigskip
+\bigskip
+\begin{footnotesize}
+\noindent\emph{Remark:} Contrary to popular believe the roofline model is built atop the notion of operational intensity\footnote{FLOPs against bytes written to DRAM} kernels. The differences to arithmetic intensities are outlined in~\textcite{williams2009}. Depending on the definition used these two terms are not necessarily interchangeable. The notion of operational intensity in the following sections might be what some would understand by the term arithmetic itensity.
+\end{footnotesize}
+
+\subsection{1/16 $\neq$ 1/16. Or: The Fancy Arithmetics of a Compiler}
+
+In order to understand why the following kernels are implemented the way they are, an example of a badly behaving $\rfrac{1}{16}$ OI kernel is given in~\prettyref{lst:1-16-simple-dangerous}. The kernel has one FP operation ($*$) and reads 16 bytes (a[i], b[i]) from memory. But in practice this algorithm does not work as expected. There are several ways how one could write the same kernel.
+
+\begin{itemize}
+\item Submitting \verb|volatile|. This results in the loop being optimized away completely for optimization levels above \verb|-O0|. 
+\item Using no optimization i.e. \verb|-O0|. No advanced features of the processor will be used (e.g., FMA requires at least \verb|-O2|). Also just about everything is read and written from and to the stack. Even loop variables. One may now assume that this is cached anyway --- or one ain't so. 
+\item Using \verb|volatile| and optimization. When volatile is used gcc reads and writes variable \verb|tmp| from and to the stack, even in \verb|-O3|. If tmp is cached or not is hard to predict. It's not improbable but relying on that assumption can yield wrong results.
+\item Using \verb|register|, \verb|volatile| and optimization. Unfortunately \verb|register| just \emph{advises} the compiler to use a register. It does not force the compiler to do so. Seemingly \verb|volatile| overrules \verb|register| in this case -- \verb|tmp| is read and written from and to the stack. Again assuming any caching behaviour is adventurous at least.
+\end{itemize}
+
+In the worst case found (no optimization, no volatile, no register) this results in reads of 16 bytes (a[i],b[i]) plus 8 bytes (i), and writes of 16 bytes (i, tmp assignment). Making no caching assumptions this results in an effective operational intensity of $\rfrac{1}{40}$ for a superficial $\rfrac{1}{16}$ OI kernel. For more complex kernels the results get even worse. A triad \verb|t=a*b+c| will store easy-to-miss intermediate results on the stack if no special care is taken.
+
+To prevent this, one could write assembly directly or rely on compiler intrinsics. The kernels in this report though consist just of normal C code which was hand-crafted until an acceptable compilation was reached. The generated machine code was disassembled and manually checked for hidden memory access. The results are therefore compiler and machine specific, but should be quite generalizable for the most part.
+
+\bigskip
+\begin{lstlisting}[caption={Simple $\rfrac{1}{16}$ kernel with questionable compiled form}, label=lst:1-16-simple-dangerous]
+volatile register double tmp = 0.1;
+for(size_t i=0; i<size; i++)
+    tmp = a[i] * b[i];
+\end{lstlisting}
+
+\subsection{The 1/16 OI Kernel}
+\label{sec:1-16}
+Two $\rfrac{1}{16}$ kernels have been implemented. The kernel in~\prettyref{lst:1-16-simple} is a standard kernel which does not assume special processor capabilities. The second kernel in~\prettyref{lst:1-16-fma} however is designed to make use of a processor's FMA unit.
+
+The simple kernel in~\prettyref{lst:1-16-simple} reads 8 bytes (a[i]) once for both operands of $*$ and writes 8 bytes (again to a[i]). This results in 16 byte operations. Only one FP instruction is executed, namely $*$. At \verb|-O2| the loop variable is held in a register. This results in an $\rfrac{1}{16}$ OI kernel.
+
+\begin{lstlisting}[caption={Simple $\rfrac{1}{16}$ OI kernel}, label=lst:1-16-simple]
+(*\textcolor{Orchid}{\#pragma omp parallel for}*)
+for(size_t i=0; i<size; i++)
+  a[i] = a[i] * a[i];
+\end{lstlisting}
+
+The FMA aware kernel in~\prettyref{lst:1-16-fma} is a bit more involved. First a triad operation is used ($*$ and $+$ operations have to be balanced). This results in 2 FP instructions executed per round. $3*8=24$ bytes have to be read (a[i], b[i], c[i]) and 8 bytes have to be written (a[i]), in sum 32 byte operations. This results in an $\rfrac{2}{32} = \rfrac{1}{16}$  OI kernel. The loop variable is again held in a register.
+
+Be aware that the FMA kernel \emph{cannot} be used on a non-FMA processor. For the FMA aware kernel to work correctly it is important that
+\begin{enumerate*}[label=(\roman*)]
+\item the processor has an FMA unit
+\item the \verb|aikern.c| library is compiled with at least \verb|-O2 -mavx -mfma|
+\item the compiled binary really makes use an FMA instruction (such as \verb|vfmadd132sd|~\cite{intelvfmadd132sd} or even \verb|vfmadd132pd|~\cite{intelvfmadd132pd} on the testers machine)
+\end{enumerate*}.
+Otherwise the results are meaningless due to write-outs of intermediary values.
+
+Also note that in order to use the full capabilities of Intel's FMA the doubles must be packed. This happens if \verb|-Ofast| is given to \verb|gcc| in addition. However this also triggers other optimizations such that the assembly gets long and complex. It is not immediately obvious that the generated assembly is correct. But no instructions could be found that do not solely use registers, except loading and storing data from and to the arrays -- just as wanted.
+
+\begin{lstlisting}[caption={FMA aware $\rfrac{1}{16}$ OI kernel}, label=lst:1-16-fma]
+(*\textcolor{Orchid}{\#pragma omp parallel for}*)
+for(size_t i=0; i<size; i++)
+  a[i] = a[i] * b[i] + c[i];
+\end{lstlisting}
+
+\subsection{The 8 OI Kernel}
+In this section the implemented 8 OI kernels are shown.~\prettyref{lst:8-1-simple} is a simple 8 OI kernel which should work on any processor. The kernel in~\prettyref{lst:8-1-fma} is tailored for processors with an FMA unit. For the kernels macros were used to repeat the floating point instructions. In some sense this behaves like a huge loop unrolling. Some of the used repeating macros are shown in~\prettyref{lst:8-1-macros}.
+
+\bigskip
+\begin{lstlisting}[caption={Macros for bulk repeating instructions}, label=lst:8-1-macros]
+#define REP0(X)
+#define REP1(X) X
+#define REP2(X) REP1(X) REP1(X)
+#define REP3(X) REP2(X) REP1(X)
+//[...]
+#define REP9(X) REP8(X) REP1(X)
+#define REP10(X)  REP9(X)  REP1(X)
+#define REP20(X) REP10(X) REP10(X)
+//[...]
+#define REP100(X) REP50(X) REP50(X)
+\end{lstlisting}
+\bigskip
+
+The simple kernel in~\prettyref{lst:8-1-simple} reads 8 bytes (a[i]) and writes 8 bytes (a[i]) while performing 128 FLOPs in total. Therefore this represents a $\rfrac{128}{16}=\rfrac{8}{1}$ OI kernel.
+
+\bigskip
+\begin{lstlisting}[caption={Simple $8$ OI kernel}, label=lst:8-1-simple]
+(*\textcolor{Orchid}{\#pragma omp parallel for}*)
+for(size_t i=0; i<size; i++){
+  a[i] = REP100(a[i]*)
+         REP20(a[i]*)
+         REP8(a[i]*)
+         REP1(a[i]);
+}
+\end{lstlisting}
+\bigskip
+
+For the most part things mentioned already in~\prettyref{sec:1-16} hold true for the 8 OI FMA aware kernel too. Please refer to~\prettyref{sec:1-16} for more detailed information about the rationale behind. Compiling this with \verb|-O2 -mavx -mfma| yields an obviously correct result. However if one wants to make use of packed doubles \verb|-Ofast| has to be used which optimizes the code further so that the disassembly is hard to grasp. Anyway it seems that with \verb|-Ofast| at least no malicious read/writes are introduced.
+
+The FMA aware kernel in~\prettyref{lst:8-1-fma} reads 8 bytes (a[i]) and writes 8 bytes (a[i] but only once per iteration), totalling 16 bytes. Please keep in mind that intermediate a[i] are not written back but instead (at least with \verb|-O2| or better) held in a register. There is only one \verb|vmovsd| instruction for writing the value back in each iteration. The kernel executes $64*2 = 128$ FLOPs. Therefore this is a $\rfrac{128}{16} = \rfrac{8}{1}$ OI kernel.
+
+\bigskip
+\begin{lstlisting}[caption={FMA aware $8$ OI kernel}, label=lst:8-1-fma]
+(*\textcolor{Orchid}{\#pragma omp parallel for}*)
+for(size_t i=0; i<size; i++){
+  REP60(a[i] = a[i] * a[i] + a[i];)
+  REP4(a[i] = a[i] * a[i] + a[i];)  
+}
+\end{lstlisting}
+\bigskip
+
 
 %%% Local Variables:
 %%% mode: latex
diff --git a/roofline/report/inputs/roofline.tex b/roofline/report/inputs/roofline.tex
index b94d152..42017e2 100644
--- a/roofline/report/inputs/roofline.tex
+++ b/roofline/report/inputs/roofline.tex
@@ -26,7 +26,7 @@ According to~\textcite[5-2 Vol.1]{intel2016} the 4th generation Intel Core proce
 
 In general an FMA unit is capable of multiple floating-point (FP) operations during a single cycle. This is directly backed by the hardware (operations are \emph{``fused''} together). Specifically the FMA unit of a Haswell processor is capable of ``[...] 256-bit floating-point instructions to perform computation on 256-bit vectors''~\cite[5-28 Vol.1]{intel2016}.
 
-Since even a DP (double-precision) FP element has only 64-bit, 256-bit would be obviously overprovisioned. But the FMA instructions do not just take scalars as arguments. Instead up to 4 DP FP elements can be packed together in a vector and operations are conducted pairwise. An example mulitply-add instruction is given in \cite{intel2}.
+Since even a DP (double-precision) FP element has only 64-bit, 256-bit would be obviously overprovisioned. But the FMA instructions do not just take scalars as arguments. Instead up to 4 DP FP elements can be packed together in a vector and operations are conducted pairwise. An example mulitply-add instruction is given in \cite{intelvfmadd132pd}.
 
 Unfortunately no definite source could be found but according to \textcite{shimpi2012} the Haswell architecture is built with 2 FMA units per core. Taking all together we get:
 
diff --git a/roofline/report/report.aux b/roofline/report/report.aux
index e5479fb..77eb787 100644
--- a/roofline/report/report.aux
+++ b/roofline/report/report.aux
@@ -29,7 +29,7 @@
 \abx@aux@cite{berstrom}
 \abx@aux@cite{ark4210}
 \abx@aux@cite{intel2016}
-\abx@aux@cite{intel2}
+\abx@aux@cite{intelvfmadd132pd}
 \abx@aux@cite{shimpi2012}
 \@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {1}Introduction}{2}{section.1}}
 \newlabel{sec:introduction}{{1}{2}{Introduction}{section.1}{}}
@@ -51,6 +51,23 @@
 \newlabel{fig:roofline}{{1}{4}{Roofline graph from the values obtained in~\prettyref {sec:peak} and~\prettyref {sec:memory}\relax }{figure.caption.3}{}}
 \@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {3}Kernels}{4}{section.3}}
 \newlabel{sec:kernels}{{3}{4}{Kernels}{section.3}{}}
-\newlabel{LastPage}{{}{4}{}{page.4}{}}
-\xdef\lastpage@lastpage{4}
-\xdef\lastpage@lastpageHy{4}
+\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {3.1}1/16 $\not =$ 1/16. Or: The Fancy Arithmetics of a Compiler}{5}{subsection.3.1}}
+\newlabel{lst:1-16-simple-dangerous}{{2}{5}{Simple $\rfrac {1}{16}$ kernel with questionable compiled form}{lstlisting.2}{}}
+\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {2}Simple ${}^{1}\tmspace  -\thinmuskip {.1667em}/_{16}$ kernel with questionable compiled form}{5}{lstlisting.2}}
+\abx@aux@cite{intelvfmadd132sd}
+\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {3.2}The 1/16 OI Kernel}{6}{subsection.3.2}}
+\newlabel{sec:1-16}{{3.2}{6}{The 1/16 OI Kernel}{subsection.3.2}{}}
+\newlabel{lst:1-16-simple}{{3}{6}{Simple $\rfrac {1}{16}$ OI kernel}{lstlisting.3}{}}
+\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {3}Simple ${}^{1}\tmspace  -\thinmuskip {.1667em}/_{16}$ OI kernel}{6}{lstlisting.3}}
+\newlabel{lst:1-16-fma}{{4}{6}{FMA aware $\rfrac {1}{16}$ OI kernel}{lstlisting.4}{}}
+\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {4}FMA aware ${}^{1}\tmspace  -\thinmuskip {.1667em}/_{16}$ OI kernel}{6}{lstlisting.4}}
+\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {3.3}The 8 OI Kernel}{6}{subsection.3.3}}
+\newlabel{lst:8-1-macros}{{5}{6}{Macros for bulk repeating instructions}{lstlisting.5}{}}
+\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {5}Macros for bulk repeating instructions}{6}{lstlisting.5}}
+\newlabel{lst:8-1-simple}{{6}{7}{Simple $8$ OI kernel}{lstlisting.6}{}}
+\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {6}Simple $8$ OI kernel}{7}{lstlisting.6}}
+\newlabel{lst:8-1-fma}{{7}{7}{FMA aware $8$ OI kernel}{lstlisting.7}{}}
+\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {7}FMA aware $8$ OI kernel}{7}{lstlisting.7}}
+\newlabel{LastPage}{{}{8}{}{page.8}{}}
+\xdef\lastpage@lastpage{8}
+\xdef\lastpage@lastpageHy{8}
diff --git a/roofline/report/report.bbl b/roofline/report/report.bbl
index 23918dd..f6323e1 100644
--- a/roofline/report/report.bbl
+++ b/roofline/report/report.bbl
@@ -79,7 +79,7 @@
       \verb https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf
       \endverb
     \endentry
-    \entry{intel2}{online}{}
+    \entry{intelvfmadd132pd}{online}{}
       \name{labelname}{1}{}{%
         {{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
       }
@@ -89,13 +89,32 @@
       \strng{namehash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
       \strng{fullhash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
       \field{sortinit}{I}
-      \field{labeltitle}{Intel Intrinsics Guide}
-      \field{title}{Intel Intrinsics Guide}
+      \field{labeltitle}{Intel Intrinsics Guide: vfmadd132pd}
+      \field{title}{Intel Intrinsics Guide: vfmadd132pd}
       \field{urlday}{19}
       \field{urlmonth}{06}
       \field{urlyear}{2016}
       \verb{url}
-      \verb https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=madd&expand=2365
+      \verb https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=vfmadd132pd&expand=2365
+      \endverb
+    \endentry
+    \entry{intelvfmadd132sd}{online}{}
+      \name{labelname}{1}{}{%
+        {{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
+      }
+      \name{author}{1}{}{%
+        {{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
+      }
+      \strng{namehash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
+      \strng{fullhash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
+      \field{sortinit}{I}
+      \field{labeltitle}{Intel Intrinsics Guide: vfmadd132sd}
+      \field{title}{Intel Intrinsics Guide: vfmadd132sd}
+      \field{urlday}{19}
+      \field{urlmonth}{06}
+      \field{urlyear}{2016}
+      \verb{url}
+      \verb https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=vfmadd132sd&expand=2365,2403
       \endverb
     \endentry
     \entry{ark4210}{online}{}
diff --git a/roofline/report/report.bcf b/roofline/report/report.bcf
index c7ff053..3651e39 100644
--- a/roofline/report/report.bcf
+++ b/roofline/report/report.bcf
@@ -1971,12 +1971,16 @@
     <bcf:citekey order="5">intel2016</bcf:citekey>
     <bcf:citekey order="6">intel2016</bcf:citekey>
     <bcf:citekey order="7">intel2016</bcf:citekey>
-    <bcf:citekey order="8">intel2</bcf:citekey>
+    <bcf:citekey order="8">intelvfmadd132pd</bcf:citekey>
     <bcf:citekey order="9">shimpi2012</bcf:citekey>
     <bcf:citekey order="10">shimpi2012</bcf:citekey>
     <bcf:citekey order="11">berstrom</bcf:citekey>
     <bcf:citekey order="12">bergstrom2</bcf:citekey>
     <bcf:citekey order="13">williams2009</bcf:citekey>
+    <bcf:citekey order="14">williams2009</bcf:citekey>
+    <bcf:citekey order="15">williams2009</bcf:citekey>
+    <bcf:citekey order="16">intelvfmadd132sd</bcf:citekey>
+    <bcf:citekey order="17">intelvfmadd132pd</bcf:citekey>
   </bcf:section>
   <bcf:sortlist section="0" type="entry" label="nty">
   <bcf:sorting>
diff --git a/roofline/report/report.blg b/roofline/report/report.blg
index 93cbf64..0acc198 100644
--- a/roofline/report/report.blg
+++ b/roofline/report/report.blg
@@ -1,14 +1,14 @@
 [0] Config.pm:318> INFO - This is Biber 1.8
 [0] Config.pm:321> INFO - Logfile is 'report.blg'
-[71] biber:275> INFO - === Thu Jun 23, 2016, 02:25:38
-[71] Biber.pm:333> INFO - Reading 'report.bcf'
-[152] Biber.pm:630> INFO - Found 7 citekeys in bib section 0
-[164] Biber.pm:3053> INFO - Processing section 0
-[187] Biber.pm:3190> INFO - Looking for bibtex format file 'roofline.bib' for section 0
-[188] bibtex.pm:937> INFO - Decoding LaTeX character macros into UTF-8
-[189] bibtex.pm:812> INFO - Found BibTeX data source 'roofline.bib'
-[236] Biber.pm:2939> INFO - Overriding locale 'en_US.UTF-8' default tailoring 'variable = shifted' with 'variable = non-ignorable'
-[236] Biber.pm:2945> INFO - Sorting 'entry' list 'nty' keys
-[236] Biber.pm:2949> INFO - No sort tailoring available for locale 'en_US.UTF-8'
-[252] bbl.pm:482> INFO - Writing 'report.bbl' with encoding 'UTF-8'
-[254] bbl.pm:555> INFO - Output to report.bbl
+[53] biber:275> INFO - === Thu Jun 23, 2016, 19:53:59
+[53] Biber.pm:333> INFO - Reading 'report.bcf'
+[116] Biber.pm:630> INFO - Found 8 citekeys in bib section 0
+[127] Biber.pm:3053> INFO - Processing section 0
+[142] Biber.pm:3190> INFO - Looking for bibtex format file 'roofline.bib' for section 0
+[144] bibtex.pm:937> INFO - Decoding LaTeX character macros into UTF-8
+[144] bibtex.pm:812> INFO - Found BibTeX data source 'roofline.bib'
+[179] Biber.pm:2939> INFO - Overriding locale 'en_US.UTF-8' default tailoring 'variable = shifted' with 'variable = non-ignorable'
+[179] Biber.pm:2945> INFO - Sorting 'entry' list 'nty' keys
+[179] Biber.pm:2949> INFO - No sort tailoring available for locale 'en_US.UTF-8'
+[197] bbl.pm:482> INFO - Writing 'report.bbl' with encoding 'UTF-8'
+[198] bbl.pm:555> INFO - Output to report.bbl
diff --git a/roofline/report/report.fdb_latexmk b/roofline/report/report.fdb_latexmk
index 67f1e53..aa0cc97 100644
--- a/roofline/report/report.fdb_latexmk
+++ b/roofline/report/report.fdb_latexmk
@@ -1,11 +1,11 @@
 # Fdb version 3
-["biber report"] 1466641538 "report.bcf" "report.bbl" "report" 1466642333
-  "report.bcf" 1466642333 92144 b16bb4d23ff7f0d4a3e0ee2f3a7b2c36 ""
-  "roofline.bib" 1466632630 3723 5c74ca6da23b4936d86117884f95cb33 ""
+["biber report"] 1466704438 "report.bcf" "report.bbl" "report" 1466709195
+  "report.bcf" 1466709195 92382 2683b542d57d2326e3b37a6a44222b52 ""
+  "roofline.bib" 1466704433 4157 226e47c750579a202f66b6f0e4df67bb ""
   (generated)
   "report.bbl"
   "report.blg"
-["pdflatex"] 1466642332 "report.tex" "report.pdf" "report" 1466642333
+["pdflatex"] 1466709193 "report.tex" "report.pdf" "report" 1466709195
   "/usr/share/texlive/texmf-dist/fonts/enc/dvips/cm-super/cm-super-t1.enc" 1136849721 2971 def0b6c1f0b107b3b936def894055589 ""
   "/usr/share/texlive/texmf-dist/fonts/enc/dvips/cm-super/cm-super-ts1.enc" 1136849721 2900 1537cc8184ad1792082cd229ecc269f4 ""
   "/usr/share/texlive/texmf-dist/fonts/map/fontname/texfonts.map" 1272929888 3287 e6b82fe08f5336d4d5ebc73fb1152e87 ""
@@ -20,6 +20,7 @@
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   "/usr/share/texlive/texmf-dist/fonts/tfm/jknappen/ec/ecrm1095.tfm" 1136768653 3584 929cdff2b7a8c11bd4d49fd68cb0ae70 ""
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diff --git a/roofline/report/report.log b/roofline/report/report.log
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diff --git a/roofline/report/report.pdf b/roofline/report/report.pdf
index a007d26..aba6179 100644
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diff --git a/roofline/report/report.tex b/roofline/report/report.tex
index f0662fc..7688648 100644
--- a/roofline/report/report.tex
+++ b/roofline/report/report.tex
@@ -46,6 +46,8 @@
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diff --git a/roofline/report/report.toc b/roofline/report/report.toc
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diff --git a/roofline/report/res/rooftop.png b/roofline/report/res/rooftop.png
deleted file mode 100644
index c68d1b0..0000000
Binary files a/roofline/report/res/rooftop.png and /dev/null differ
diff --git a/roofline/report/roofline.bib b/roofline/report/roofline.bib
index 6842fda..3b640b4 100644
--- a/roofline/report/roofline.bib
+++ b/roofline/report/roofline.bib
@@ -42,10 +42,20 @@
   Timestamp                = {2016.06.20}
 }
 
-@Online{intel2,
-  Title                    = {Intel Intrinsics Guide},
+@Online{intelvfmadd132pd,
+  Title                    = {Intel Intrinsics Guide: vfmadd132pd},
   Author                   = {{Intel}},
-  Url                      = {https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=madd&expand=2365},
+  Url                      = {https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=vfmadd132pd&expand=2365},
+  Urldate                  = {2016-06-19},
+
+  Owner                    = {armin},
+  Timestamp                = {2016.06.22}
+}
+
+@Online{intelvfmadd132sd,
+  Title                    = {Intel Intrinsics Guide: vfmadd132sd},
+  Author                   = {{Intel}},
+  Url                      = {https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=vfmadd132sd&expand=2365,2403},
   Urldate                  = {2016-06-19},
 
   Owner                    = {armin},
diff --git a/roofline/src/Makefile b/roofline/src/Makefile
index ac89864..8c2b285 100644
--- a/roofline/src/Makefile
+++ b/roofline/src/Makefile
@@ -1,7 +1,8 @@
-all: roofline roofline_avx roofline_o3avx roofline_o3 roofline_avxfma
+all: roofline roofline_avx roofline_o3avx roofline_o3 roofline_avxfma roofline_avxfmafast
 
+# Roofline Binary
 roofline: roofline.c aikern.a
-	gcc -Wall -Wextra -O3 -std=c99 -fopenmp $^ -o $@
+	gcc -Wall -Wextra -std=c99 -fopenmp $^ -o $@
 
 roofline_avx: roofline.c aikern_avx.a
 	gcc -Wall -Wextra -O3 -std=c99 -fopenmp $^ -o $@
@@ -15,6 +16,10 @@ roofline_o3: roofline.c aikern_o3.a
 roofline_avxfma: roofline.c aikern_avxfma.a
 	gcc -Wall -Wextra -O3 -std=c99 -fopenmp $^ -o $@
 
+roofline_avxfmafast: roofline.c aikern_avxfmafast.a
+	gcc -Wall -Wextra -O3 -std=c99 -fopenmp $^ -o $@
+
+# Static Libraries
 aikern.a: aikern.c aikern.h
 	gcc -c -o aikern.o aikern.c
 	ar rcs aikern.a aikern.o
@@ -36,8 +41,17 @@ aikern_avxfma.a: aikern.c aikern.h
 	gcc -O2 -mavx -mfma -c -o aikern_avxfma.o aikern.c
 	ar rcs aikern_avxfma.a aikern_avxfma.o
 
+aikern_avxfmafast.a: aikern.c aikern.h
+	gcc -O2 -mavx -mfma -Ofast -c -o aikern_avxfmafastmath.o aikern.c
+	ar rcs aikern_avxfmafast.a aikern_avxfmafastmath.o
+
+aikern_avxfmafastmath.a: aikern.c aikern.h
+	gcc -O2 -mavx -mfma -Ofast -ffast-math -c -o aikern_avxfmafastmath.o aikern.c
+	ar rcs aikern_avxfmafast.a aikern_avxfmafastmath.o
+
+
 clean:
-	rm -f roofline roofline_avx roofline_o3avx roofline_o3 roofline_avxfma
+	rm -f roofline roofline_avx roofline_o3avx roofline_o3 roofline_avxfma roofline_avxfmafast
 	rm -f *.o
 	rm -f *.a
 	rm -f *.so
diff --git a/roofline/src/aikern.c b/roofline/src/aikern.c
index e66d7f0..1ff84cb 100644
--- a/roofline/src/aikern.c
+++ b/roofline/src/aikern.c
@@ -23,6 +23,8 @@ void kernel_1_16_fuseaware(double* a, double* b, double* c, size_t size)
 	 vmovsd xmm1,QWORD PTR [rdx+rax*8]				# 1 read
 	 vfmadd132sd xmm0,xmm1,QWORD PTR [rsi+rax*8]	# 2 FLOPs + 1 read
 	 vmovsd QWORD PTR [rdi+rax*8],xmm0				# 1 write
+
+	 Uses packed doubles with -Ofast.
   */
   
   #pragma omp parallel for
@@ -36,6 +38,26 @@ void kernel_1_16_fuseaware(double* a, double* b, double* c, size_t size)
   }
 }
 
+#define REP0(X)
+#define REP1(X) X
+#define REP2(X) REP1(X) REP1(X)
+#define REP3(X) REP2(X) REP1(X)
+#define REP4(X) REP3(X) REP1(X)
+#define REP5(X) REP4(X) REP1(X)
+#define REP6(X) REP5(X) REP1(X)
+#define REP7(X) REP6(X) REP1(X)
+#define REP8(X) REP7(X) REP1(X)
+#define REP9(X) REP8(X) REP1(X)
+
+#define REP10(X)  REP9(X)  REP1(X)
+#define REP20(X) REP10(X) REP10(X)
+#define REP30(X) REP20(X) REP10(X)
+#define REP40(X) REP30(X) REP10(X)
+#define REP50(X) REP40(X) REP10(X)
+#define REP60(X) REP50(X) REP10(X)
+  
+#define REP100(X) REP50(X) REP50(X)
+
 void kernel_8_1_simple(double* a, double* b, double* c, size_t size)
 {
   /* === Warning ===
@@ -49,7 +71,7 @@ void kernel_8_1_simple(double* a, double* b, double* c, size_t size)
 
 	 vmovsd xmm1,QWORD PTR [rdi]					# 1 read
 	 vmulsd xmm0,xmm1,xmm1							# 1 FLOP+register shuffling
-	 vmulsd xmm0,xmm0,xmm1							# 15x 1 FLOP+register shuffling
+	 vmulsd xmm0,xmm0,xmm1							# 127x 1 FLOP+register shuffling
 	 # [...]
 	 vmovsd QWORD PTR [rdi-0x8],xmm0				# 1 write
   */
@@ -57,16 +79,14 @@ void kernel_8_1_simple(double* a, double* b, double* c, size_t size)
   #pragma omp parallel for
   for(size_t i=0; i<size; i++){
 	/* 
-	   COMM: 1 read+1 write 
-	   COMP: 16 FLOPs 
-	   -> AI = 8 
+	   COMM: 1 read+1 write = 16 byte
+	   COMP: 128 FLOPs
+	   -> AI = 128/16 = 8 
 	*/
-	a[i] = a[i] * a[i] * a[i] *
-		   a[i] * a[i] * a[i] *
-		   a[i] * a[i] * a[i] *
-	 	   a[i] * a[i] * a[i] *
-		   a[i] * a[i] * a[i] *
-	       a[i] * a[i];
+	a[i] = REP100(a[i]*)
+		   REP20(a[i]*)
+		   REP8(a[i]*)
+		   REP1(a[i]);
   }
 }
 
@@ -76,28 +96,25 @@ void kernel_8_1_fuseaware(double* a, double* b, double* c, size_t size)
 	With FMA (and -O2):
 
 	vmovsd xmm0,QWORD PTR [rdi]					# 1 read
-	vfmadd132sd xmm0,xmm0,xmm0					# 8x 2 FLOPs+register shuffling
+	vfmadd132sd xmm0,xmm0,xmm0					# 64 x 2 FLOPs+register shuffling
 	vmovsd QWORD PTR [rdi-0x8],xmm0				# 1 write
+
+	 Uses packed doubles with -Ofast.
    */
 
   #pragma omp parallel for
   for(size_t i=0; i<size; i++){
 	/* 
 	   COMM: 1 read + 1 write
-	   COMP: 16 FLOP
+	   COMP: 128 FLOP
 	   -> AI = 8 
 	*/
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
-	a[i] = a[i] * a[i] + a[i];
+	REP60(a[i] = a[i] * a[i] + a[i];)
+	REP4(a[i] = a[i] * a[i] + a[i];)  
   }
 }
 
+
 /* === FAILED KERNELS === */
 
 /*
@@ -127,7 +144,7 @@ void kernel_1_16_simple_dangerous(double* a, double* b, double* c, size_t size)
   
   // volatile to prevent compiler from optimizing this away
   // register to advise compiler to put this in register
-  volatile register double tmp = 0.1;
+  double tmp = 0.1;
 
   #pragma omp parallel for
   for(size_t i=0; i<size; i++){
diff --git a/roofline/src/roofline b/roofline/src/roofline
index 26a161e..e16bf7a 100755
Binary files a/roofline/src/roofline and b/roofline/src/roofline differ
diff --git a/roofline/src/roofline_avx b/roofline/src/roofline_avx
index eda13cf..bf0b7a0 100755
Binary files a/roofline/src/roofline_avx and b/roofline/src/roofline_avx differ
diff --git a/roofline/src/roofline_avxfma b/roofline/src/roofline_avxfma
index 73dad9a..1ef74d4 100755
Binary files a/roofline/src/roofline_avxfma and b/roofline/src/roofline_avxfma differ
diff --git a/roofline/src/roofline_avxfmafast b/roofline/src/roofline_avxfmafast
new file mode 100755
index 0000000..54782c3
Binary files /dev/null and b/roofline/src/roofline_avxfmafast differ
diff --git a/roofline/src/roofline_o3 b/roofline/src/roofline_o3
index 1457ee0..88fcc24 100755
Binary files a/roofline/src/roofline_o3 and b/roofline/src/roofline_o3 differ
diff --git a/roofline/src/roofline_o3avx b/roofline/src/roofline_o3avx
index e3288a1..e339598 100755
Binary files a/roofline/src/roofline_o3avx and b/roofline/src/roofline_o3avx differ