hälfte vom roofline report fertig
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15 changed files with 475 additions and 319 deletions
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plot/plot.py
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67
plot/plot.py
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import pandas as pd
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import numpy as np
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import matplotlib.pyplot as plt
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import matplotlib
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from matplotlib.ticker import ScalarFormatter, FormatStrFormatter
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matplotlib.style.use('ggplot')
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# Roofline Plot
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#log x
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i = 32
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xlbl = []
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while i > 1:
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xlbl.append("1/"+repr(i))
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i //= 2
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xlbl.append(repr(i)) #1
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i += 1
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while i<=64:
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xlbl.append(repr(i))
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i *= 2
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# memory
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values = []
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bandwidth = 10.6
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peak = 86.4
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ymem = []
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ypeak = []
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for i in np.arange(0,64,0.1):
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if bandwidth*i < peak:
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values.append(bandwidth*i)
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else:
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values.append(peak)
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i=1/32
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while i<=64:
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if bandwidth*i < peak and bandwidth*i*2 < peak:
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ymem.append(bandwidth*i)
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ypeak.append(None)
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elif bandwidth*i < peak and bandwidth*i*2 > peak:
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ypeak.append(peak)
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ymem.append(bandwidth*i)
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else:
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ypeak.append(peak)
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ymem.append(None)
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i*=2
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#plot data
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#data = pd.Series(data=values, name='Peak Memory Bandwidth', index=np.arange(0,64,0.1))
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data = {'Peak Memory Bandwidth': pd.Series(ymem, index=xlbl), 'Peak Floating-Point Performance': pd.Series(ypeak, index=xlbl)}
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df = pd.DataFrame(data)
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ax = df.plot()
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ax.set_xlabel("Operational Itensity (FLOP/Byte)")
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ax.set_ylabel("Attainable GFLOP/s")
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ax.set_yscale('log', basey=2)
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ax.yaxis.set_major_formatter(FormatStrFormatter('%.0f'))
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print(repr(data))
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plt.show()
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@ -1,5 +1,7 @@
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According to the definition used the arithmetic intensity is measured by operations per byte. This might not be adequat for haswell processors (and later). Due to the fused multiply-add\footnote{although called multiply-add there are 36 different slightly instructions} extension two floating point operations can be performed with a single instruction.
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According to the definition used the arithmetic intensity is measured by operations per byte. This might not be adequat for haswell processors (and later). Due to the fused multiply-add\footnote{although called multiply-add there are 36 different slightly instructions} extension two floating point operations can be performed with a single instruction.
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- worse results for 4 threads @ NUMA-STREAM not necessarily expected
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%%% Local Variables:
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%%% Local Variables:
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%%% mode: latex
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%%% mode: latex
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%%% TeX-master: "../report"
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%%% TeX-master: "../report"
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@ -1,5 +1,8 @@
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In this section a roofline model~\cite{williams2009} will be created for the Intel\textregistered{} Core\texttrademark{} i5-4210U. In \prettyref{sec:peak} the theoretical floating-point peak performance of the CPU is calculated. \prettyref{sec:memory} then shows memory bandwidth measurements gathered with NUMA-STREAM~\cite{berstrom}. These ingredients are put together into the roofline model which is constructed in \prettyref{sec:model}.
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\subsection{Theoretical Peak Performance}
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\subsection{Theoretical Peak Performance}
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The first CPU under test was a Intel\textregistered{} Core\texttrademark{} i5-4210U. \prettyref{tbl:spec-4210} shows the relevant specifications for this processor according to \textcite{ark4210}.
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\label{sec:peak}
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The CPU under test was a Intel\textregistered{} Core\texttrademark{} i5-4210U. \prettyref{tbl:spec-4210} shows the relevant specifications for this processor according to~\textcite{ark4210}.
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\begin{table}[h!]
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\begin{table}[h!]
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\centering
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\centering
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@ -7,26 +10,69 @@ The first CPU under test was a Intel\textregistered{} Core\texttrademark{} i5-42
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\toprule
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\toprule
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Specification & Value \\
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Specification & Value \\
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\midrule
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\midrule
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Instruction Set Extension & SSE4.1/4.2, AVX 2.0 \\
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\# of Cores & 2 \\
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\# of Cores & 2 \\
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Processor Base Frequency & 1.7 GHz \\
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\# of Threads & 4 \\
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Max Turbo Frequency & 2.7 GHz \\
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Microarchitecture & Haswell \\
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Microarchitecture & Haswell \\
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Max Turbo Frequency & 2.7 GHz \\
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Processor Base Frequency & 1.7 GHz \\
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Instruction Set Extension & SSE 4.1/4.2, AVX 2.0 \\
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\bottomrule
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\bottomrule
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\end{tabular}
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\end{tabular}
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\caption{Intel\textregistered{} Core\texttrademark{} i5-4210U processor specifications~\cite{ark4210}}
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\caption{Relevant processor specifications}
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\label{tbl:spec-4210}
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\label{tbl:spec-4210}
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\end{table}
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\end{table}
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The 4th generation Intel Core processors provide FMA\footnote{Fused Multiply Add} and AVX\footnote{Advanced Vector Extension} extensions~\cite[5-2 Vol.1]{intel2016}. An FMA unit is capable of ``[...] 256-bit floating-point instructions to perform computation on
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According to~\textcite[5-2 Vol.1]{intel2016} the 4th generation Intel Core processors provide FMA (Fused Multiply-Add) units and AVX (Advanced Vector Extension). Whereas AVX can be the main driver for floating-point peak performance, the peak in this case is mainly determined by the FMA unit.
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256-bit vectors''~\cite[5-28 Vol.1]{intel2016}. Therefore it can execute 2 (multiply-add) times 4 double-precision floating-point instructions each cycle. This results in 8 DP FLOPs per cycle.
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Unfortunately no definite source could be found but according to \textcite{shimpi2012} the Haswell architecture has 2 FMA units, equalling to $2 * 8 = 16$ DP FLOPs per core. Furthermore there are 2 cores in a Core i5 processor. Taken together this results in $16 * 2 = 32$ DP FLOPs per cycle for both cores.
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In general an FMA unit is capable of multiple floating-point (FP) operations during a single cycle. This is directly backed by the hardware (operations are \emph{``fused''} together). Specifically the FMA unit of a Haswell processor is capable of ``[...] 256-bit floating-point instructions to perform computation on 256-bit vectors''~\cite[5-28 Vol.1]{intel2016}.
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At max frequency the processor is therefore capable of a theoretical peak performance of $32*2.7 = 86.4$ GFLOP/s.
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Since even a DP (double-precision) FP element has only 64-bit, 256-bit would be obviously overprovisioned. But the FMA instructions do not just take scalars as arguments. Instead up to 4 DP FP elements can be packed together in a vector and operations are conducted pairwise. An example mulitply-add instruction is given in \cite{intel2}.
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Unfortunately no definite source could be found but according to \textcite{shimpi2012} the Haswell architecture is built with 2 FMA units per core. Taking all together we get:
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\begin{enumerate}
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\item Two operations are conducted at once (``fused'') and up to four DP FP elements can be packed into the argument vectors. At optimal untilization the FMA unit therefore provides $2*4 = 8 ~\text{DP FLOPs}$ each cycle.
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\item Two cores each with two FMAs can then calculate $2 * 2 * 8 = 32 ~\text{DP FLOPs}$
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\end{enumerate}
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\noindent{}At maximum turbo frequency the processor therefore has a theoretical peak performance of $32*2.7 = 86.4 ~\text{GFLOP/s}$. At base frequency it is capable of $32*1.7 = 54.4 ~\text{GFLOP/s}$.
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\subsection{Memory Bandwidth}
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\label{sec:memory}
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To benchmark the memory bandwidth NUMA-STREAM~\cite{berstrom} was used. The binary ran on a Fedora 23 system with kernel \verb|4.5.7-200.fc23.x86_64 x86_64| in \verb|multi-user.target| to turn off as many distractors as possible. Compilation was done with gcc and the following options: \texttt{-O3 -std=c99 -fopenmp -lnuma -DN=80000000 -DNTIMES=100}.
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\printbibliography
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Again the details of the processor architecture offer a bit of a challenge. The i5-4210U is hyper threaded meaning it provides 4 hardware threads on 2 physical cores. It is not immediately obvious how many threads NUMA-STREAM should be configured with. For this test both configurations\footnote{plus two configurations with 8 and 1 threads respectively for cross checking} were tested and the best one was chosen. The results for NUMA-STREAM configured with two threads are listed in~\prettyref{lst:numa-stream-results}. Prefixes are given in metric scale, i.e. $M = 10^6$ not $2^{20}$.The highest achieved rate was $10608~\text{MB/s}$ with the triad function. The triad function is the most demanding kernel of NUMA-STREAM defined at \cite{bergstrom2} as \lstinline[language=C]|a[j] = b[j]+scalar*c[j]|. All other tested configurations had worse results for all 4 kernels although with at most $300~\text{MB/s}$ difference.
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\bigskip
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\begin{lstlisting}[caption={NUMA-STREAM results for two threads}, label=lst:numa-stream-results, numbers=none]
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Function Rate (MB/s) Avg time Min time Max time
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Copy: 9373.3846 0.1368 0.1366 0.1390
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Scale: 9414.1304 0.1361 0.1360 0.1381
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Add: 10614.6002 0.1812 0.1809 0.1835
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Triad: 10607.7910 0.1813 0.1810 0.1834
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\end{lstlisting}
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\bigskip
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\subsection{Graph}
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\label{sec:model}
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The graph of the roofline model is defined by~\cite{williams2009}:
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\begin{verbatim}
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Attainable GFLOP/s = Min(Peak FLOP,
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Peak Memory Bandwidth*Operational Intensity)
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\end{verbatim}
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\noindent{}The resulting graph for the values obtained in~\prettyref{sec:peak} and~\prettyref{sec:memory} can be seen in \prettyref{fig:roofline}.
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\begin{figure}
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\begin{adjustbox}{center}
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\includegraphics[width=0.8\linewidth]{res/rooftop}
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\end{adjustbox}
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\caption{Roofline graph from the values obtained in~\prettyref{sec:peak} and~\prettyref{sec:memory}}
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\label{fig:roofline}
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\end{figure}
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%%% Local Variables:
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%%% Local Variables:
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%%% mode: latex
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%%% mode: latex
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@ -25,20 +25,32 @@
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\select@language{english}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\select@language{english}}
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\@writefile{lof}{\defcounter {refsection}{0}\relax }\@writefile{lof}{\select@language{english}}
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\@writefile{lof}{\defcounter {refsection}{0}\relax }\@writefile{lof}{\select@language{english}}
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\@writefile{lot}{\defcounter {refsection}{0}\relax }\@writefile{lot}{\select@language{english}}
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\@writefile{lot}{\defcounter {refsection}{0}\relax }\@writefile{lot}{\select@language{english}}
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\abx@aux@cite{williams2009}
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\abx@aux@cite{berstrom}
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\abx@aux@cite{ark4210}
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\abx@aux@cite{ark4210}
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\abx@aux@cite{intel2016}
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\abx@aux@cite{intel2016}
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\abx@aux@cite{intel2}
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\abx@aux@cite{shimpi2012}
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\abx@aux@cite{shimpi2012}
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\abx@aux@cite{dukhan}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {1}Introduction}{2}{section.1}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {1}Introduction}{2}{section.1}}
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\newlabel{sec:introduction}{{1}{2}{Introduction}{section.1}{}}
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\newlabel{sec:introduction}{{1}{2}{Introduction}{section.1}{}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {2}Roofline Model}{2}{section.2}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {2}Roofline Model}{2}{section.2}}
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\newlabel{sec:roofline}{{2}{2}{Roofline Model}{section.2}{}}
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\newlabel{sec:roofline}{{2}{2}{Roofline Model}{section.2}{}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {2.1}Theoretical Peak Performance}{2}{subsection.2.1}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {2.1}Theoretical Peak Performance}{2}{subsection.2.1}}
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\@writefile{lot}{\defcounter {refsection}{0}\relax }\@writefile{lot}{\contentsline {table}{\numberline {1}{\ignorespaces Intel\textregistered {} Core\texttrademark {} i5-4210U processor specifications~\cite {ark4210}\relax }}{2}{table.caption.2}}
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\newlabel{sec:peak}{{2.1}{2}{Theoretical Peak Performance}{subsection.2.1}{}}
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\@writefile{lot}{\defcounter {refsection}{0}\relax }\@writefile{lot}{\contentsline {table}{\numberline {1}{\ignorespaces Relevant processor specifications\relax }}{2}{table.caption.2}}
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\providecommand*\caption@xref[2]{\@setref\relax\@undefined{#1}}
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\providecommand*\caption@xref[2]{\@setref\relax\@undefined{#1}}
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\newlabel{tbl:spec-4210}{{1}{2}{Intel\textregistered {} Core\texttrademark {} i5-4210U processor specifications~\cite {ark4210}\relax }{table.caption.2}{}}
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\newlabel{tbl:spec-4210}{{1}{2}{Relevant processor specifications\relax }{table.caption.2}{}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {3}Kernels}{3}{section.3}}
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\abx@aux@cite{bergstrom2}
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\newlabel{sec:kernels}{{3}{3}{Kernels}{section.3}{}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {2.2}Memory Bandwidth}{3}{subsection.2.2}}
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\newlabel{LastPage}{{}{3}{}{page.3}{}}
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\newlabel{sec:memory}{{2.2}{3}{Memory Bandwidth}{subsection.2.2}{}}
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\xdef\lastpage@lastpage{3}
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\newlabel{lst:numa-stream-results}{{1}{3}{NUMA-STREAM results for two threads}{lstlisting.1}{}}
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\xdef\lastpage@lastpageHy{3}
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\@writefile{lol}{\defcounter {refsection}{0}\relax }\@writefile{lol}{\contentsline {lstlisting}{\numberline {1}NUMA-STREAM results for two threads}{3}{lstlisting.1}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {subsection}{\numberline {2.3}Graph}{3}{subsection.2.3}}
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\newlabel{sec:model}{{2.3}{3}{Graph}{subsection.2.3}{}}
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\@writefile{lof}{\defcounter {refsection}{0}\relax }\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces Roofline graph from the values obtained in~\hyperref [sec:peak]{Section~\ref *{sec:peak}} and~\hyperref [sec:memory]{Section~\ref *{sec:memory}}\relax }}{4}{figure.caption.3}}
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\newlabel{fig:roofline}{{1}{4}{Roofline graph from the values obtained in~\prettyref {sec:peak} and~\prettyref {sec:memory}\relax }{figure.caption.3}{}}
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\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {3}Kernels}{4}{section.3}}
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\newlabel{sec:kernels}{{3}{4}{Kernels}{section.3}{}}
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\xdef\lastpage@lastpage{4}
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\refsection{0}
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\refsection{0}
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\sortlist{entry}{nty}
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\entry{dukhan}{online}{}
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\entry{berstrom}{online}{}
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\name{labelname}{1}{}{%
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\name{labelname}{1}{}{%
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{{hash=ed84b6085046bdd016a6224a8de0961a}{Dukhan}{D\bibinitperiod}{Marat}{M\bibinitperiod}{}{}{}{}}%
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{{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
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}
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}
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\name{author}{1}{}{%
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\name{author}{1}{}{%
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{{hash=ed84b6085046bdd016a6224a8de0961a}{Dukhan}{D\bibinitperiod}{Marat}{M\bibinitperiod}{}{}{}{}}%
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{{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
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}
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}
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\strng{namehash}{ed84b6085046bdd016a6224a8de0961a}
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\strng{namehash}{f138f2b760ef7bf1265cad7357981ef4}
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\strng{fullhash}{ed84b6085046bdd016a6224a8de0961a}
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\strng{fullhash}{f138f2b760ef7bf1265cad7357981ef4}
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\field{sortinit}{D}
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\field{sortinit}{B}
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\field{labeltitle}{FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2}
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\field{labeltitle}{NUMA-STREAM}
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\field{title}{FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2}
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\field{title}{NUMA-STREAM}
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\field{urlday}{20}
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\field{urlday}{20}
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\field{urlmonth}{06}
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\field{urlmonth}{06}
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\field{urlyear}{2016}
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\field{urlyear}{2016}
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\verb{url}
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\verb{url}
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\verb http://stackoverflow.com/a/15657772
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\verb https://github.com/larsbergstrom/NUMA-STREAM
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\endverb
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\endentry
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\entry{bergstrom2}{online}{}
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\name{labelname}{1}{}{%
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{{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
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}
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\name{author}{1}{}{%
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{{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
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}
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\strng{namehash}{f138f2b760ef7bf1265cad7357981ef4}
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\strng{fullhash}{f138f2b760ef7bf1265cad7357981ef4}
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\field{sortinit}{B}
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\field{labeltitle}{stream.c}
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\field{title}{stream.c}
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\field{urlday}{20}
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\field{urlmonth}{06}
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\field{urlyear}{2016}
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\verb{url}
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\verb https://github.com/larsbergstrom/NUMA-STREAM/blob/e5aa9ca4a77623ff6f1c2d5daa7995565b944506/stream.c#L286
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\endverb
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\endverb
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\endentry
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\endentry
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\entry{intel2016}{online}{}
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\entry{intel2016}{online}{}
|
||||||
|
@ -60,6 +79,25 @@
|
||||||
\verb https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf
|
\verb https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf
|
||||||
\endverb
|
\endverb
|
||||||
\endentry
|
\endentry
|
||||||
|
\entry{intel2}{online}{}
|
||||||
|
\name{labelname}{1}{}{%
|
||||||
|
{{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
|
||||||
|
}
|
||||||
|
\name{author}{1}{}{%
|
||||||
|
{{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
|
||||||
|
}
|
||||||
|
\strng{namehash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
|
||||||
|
\strng{fullhash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
|
||||||
|
\field{sortinit}{I}
|
||||||
|
\field{labeltitle}{Intel Intrinsics Guide}
|
||||||
|
\field{title}{Intel Intrinsics Guide}
|
||||||
|
\field{urlday}{19}
|
||||||
|
\field{urlmonth}{06}
|
||||||
|
\field{urlyear}{2016}
|
||||||
|
\verb{url}
|
||||||
|
\verb https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=madd&expand=2365
|
||||||
|
\endverb
|
||||||
|
\endentry
|
||||||
\entry{ark4210}{online}{}
|
\entry{ark4210}{online}{}
|
||||||
\name{labelname}{1}{}{%
|
\name{labelname}{1}{}{%
|
||||||
{{hash=7e5a7615b54a4cc38565e3ac9203a5f7}{{Intel\bibnamedelimb Ark}}{I\bibinitperiod}{}{}{}{}{}{}}%
|
{{hash=7e5a7615b54a4cc38565e3ac9203a5f7}{{Intel\bibnamedelimb Ark}}{I\bibinitperiod}{}{}{}{}{}{}}%
|
||||||
|
@ -101,6 +139,31 @@
|
||||||
\verb http://www.anandtech.com/show/6355/intels-haswell-architecture/8
|
\verb http://www.anandtech.com/show/6355/intels-haswell-architecture/8
|
||||||
\endverb
|
\endverb
|
||||||
\endentry
|
\endentry
|
||||||
|
\entry{williams2009}{article}{}
|
||||||
|
\name{labelname}{3}{}{%
|
||||||
|
{{hash=4fb8fbc5c4bfbbc94f80321c3336b71b}{Williams}{W\bibinitperiod}{Samuel}{S\bibinitperiod}{}{}{}{}}%
|
||||||
|
{{hash=1cdbf6b1b2783ec44ba9770f07e6528f}{Waterman}{W\bibinitperiod}{Andrew}{A\bibinitperiod}{}{}{}{}}%
|
||||||
|
{{hash=64f58317379ddd1a24e0e6cba85ae78c}{Patterson}{P\bibinitperiod}{David}{D\bibinitperiod}{}{}{}{}}%
|
||||||
|
}
|
||||||
|
\name{author}{3}{}{%
|
||||||
|
{{hash=4fb8fbc5c4bfbbc94f80321c3336b71b}{Williams}{W\bibinitperiod}{Samuel}{S\bibinitperiod}{}{}{}{}}%
|
||||||
|
{{hash=1cdbf6b1b2783ec44ba9770f07e6528f}{Waterman}{W\bibinitperiod}{Andrew}{A\bibinitperiod}{}{}{}{}}%
|
||||||
|
{{hash=64f58317379ddd1a24e0e6cba85ae78c}{Patterson}{P\bibinitperiod}{David}{D\bibinitperiod}{}{}{}{}}%
|
||||||
|
}
|
||||||
|
\list{publisher}{1}{%
|
||||||
|
{ACM}%
|
||||||
|
}
|
||||||
|
\strng{namehash}{8fbf7ed9bc5abefeb2fdf60a347400ae}
|
||||||
|
\strng{fullhash}{8fbf7ed9bc5abefeb2fdf60a347400ae}
|
||||||
|
\field{sortinit}{W}
|
||||||
|
\field{labeltitle}{Roofline: an insightful visual performance model for multicore architectures}
|
||||||
|
\field{journaltitle}{Communications of the ACM}
|
||||||
|
\field{number}{4}
|
||||||
|
\field{title}{Roofline: an insightful visual performance model for multicore architectures}
|
||||||
|
\field{volume}{52}
|
||||||
|
\field{year}{2009}
|
||||||
|
\field{pages}{65\bibrangedash 76}
|
||||||
|
\endentry
|
||||||
\endsortlist
|
\endsortlist
|
||||||
\endrefsection
|
\endrefsection
|
||||||
\endinput
|
\endinput
|
||||||
|
|
|
@ -1964,15 +1964,19 @@
|
||||||
<bcf:datasource type="file" datatype="bibtex">roofline.bib</bcf:datasource>
|
<bcf:datasource type="file" datatype="bibtex">roofline.bib</bcf:datasource>
|
||||||
</bcf:bibdata>
|
</bcf:bibdata>
|
||||||
<bcf:section number="0">
|
<bcf:section number="0">
|
||||||
<bcf:citekey order="1">ark4210</bcf:citekey>
|
<bcf:citekey order="1">williams2009</bcf:citekey>
|
||||||
<bcf:citekey order="2">ark4210</bcf:citekey>
|
<bcf:citekey order="2">berstrom</bcf:citekey>
|
||||||
<bcf:citekey order="3">ark4210</bcf:citekey>
|
<bcf:citekey order="3">ark4210</bcf:citekey>
|
||||||
<bcf:citekey order="4">ark4210</bcf:citekey>
|
<bcf:citekey order="4">ark4210</bcf:citekey>
|
||||||
<bcf:citekey order="5">intel2016</bcf:citekey>
|
<bcf:citekey order="5">intel2016</bcf:citekey>
|
||||||
<bcf:citekey order="6">intel2016</bcf:citekey>
|
<bcf:citekey order="6">intel2016</bcf:citekey>
|
||||||
<bcf:citekey order="7">shimpi2012</bcf:citekey>
|
<bcf:citekey order="7">intel2016</bcf:citekey>
|
||||||
<bcf:citekey order="8">shimpi2012</bcf:citekey>
|
<bcf:citekey order="8">intel2</bcf:citekey>
|
||||||
<bcf:citekey order="9">dukhan</bcf:citekey>
|
<bcf:citekey order="9">shimpi2012</bcf:citekey>
|
||||||
|
<bcf:citekey order="10">shimpi2012</bcf:citekey>
|
||||||
|
<bcf:citekey order="11">berstrom</bcf:citekey>
|
||||||
|
<bcf:citekey order="12">bergstrom2</bcf:citekey>
|
||||||
|
<bcf:citekey order="13">williams2009</bcf:citekey>
|
||||||
</bcf:section>
|
</bcf:section>
|
||||||
<bcf:sortlist section="0" type="entry" label="nty">
|
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|
||||||
<bcf:sorting>
|
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|
||||||
|
|
|
@ -1,14 +1,14 @@
|
||||||
[0] Config.pm:318> INFO - This is Biber 1.8
|
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|
||||||
[0] Config.pm:321> INFO - Logfile is 'report.blg'
|
[0] Config.pm:321> INFO - Logfile is 'report.blg'
|
||||||
[54] biber:275> INFO - === Mon Jun 20, 2016, 01:10:36
|
[71] biber:275> INFO - === Thu Jun 23, 2016, 02:25:38
|
||||||
[54] Biber.pm:333> INFO - Reading 'report.bcf'
|
[71] Biber.pm:333> INFO - Reading 'report.bcf'
|
||||||
[123] Biber.pm:630> INFO - Found 4 citekeys in bib section 0
|
[152] Biber.pm:630> INFO - Found 7 citekeys in bib section 0
|
||||||
[134] Biber.pm:3053> INFO - Processing section 0
|
[164] Biber.pm:3053> INFO - Processing section 0
|
||||||
[150] Biber.pm:3190> INFO - Looking for bibtex format file 'roofline.bib' for section 0
|
[187] Biber.pm:3190> INFO - Looking for bibtex format file 'roofline.bib' for section 0
|
||||||
[151] bibtex.pm:937> INFO - Decoding LaTeX character macros into UTF-8
|
[188] bibtex.pm:937> INFO - Decoding LaTeX character macros into UTF-8
|
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[152] bibtex.pm:812> INFO - Found BibTeX data source 'roofline.bib'
|
[189] bibtex.pm:812> INFO - Found BibTeX data source 'roofline.bib'
|
||||||
[180] Biber.pm:2939> INFO - Overriding locale 'en_US.UTF-8' default tailoring 'variable = shifted' with 'variable = non-ignorable'
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||||||
[187] bbl.pm:482> INFO - Writing 'report.bbl' with encoding 'UTF-8'
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[188] bbl.pm:555> INFO - Output to report.bbl
|
[254] bbl.pm:555> INFO - Output to report.bbl
|
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|
|
@ -1,77 +1,75 @@
|
||||||
# Fdb version 3
|
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["biber report"] 1466377836 "report.bcf" "report.bbl" "report" 1466377839
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(generated)
|
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|
||||||
"report.bbl"
|
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||||||
"report.blg"
|
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["pdflatex"] 1466377837 "report.tex" "report.pdf" "report" 1466377839
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||||||
|
Url = {https://github.com/larsbergstrom/NUMA-STREAM/blob/e5aa9ca4a77623ff6f1c2d5daa7995565b944506/stream.c#L286},
|
||||||
|
Urldate = {2016-06-20},
|
||||||
|
|
||||||
|
Owner = {armin},
|
||||||
|
Timestamp = {2016.06.22}
|
||||||
|
}
|
||||||
|
|
||||||
|
@Online{bergstrom3,
|
||||||
|
Title = {stream.c},
|
||||||
|
Author = {Lars Bergstrom},
|
||||||
|
Url = {https://github.com/larsbergstrom/NUMA-STREAM/blob/e5aa9ca4a77623ff6f1c2d5daa7995565b944506/stream.c#L307},
|
||||||
|
Urldate = {2016-06-20},
|
||||||
|
|
||||||
|
Owner = {armin},
|
||||||
|
Timestamp = {2016.06.22}
|
||||||
|
}
|
||||||
|
|
||||||
|
@Online{berstrom,
|
||||||
|
Title = {NUMA-STREAM},
|
||||||
|
Author = {Lars Bergstrom},
|
||||||
|
Url = {https://github.com/larsbergstrom/NUMA-STREAM},
|
||||||
|
Urldate = {2016-06-20},
|
||||||
|
|
||||||
|
Owner = {armin},
|
||||||
|
Timestamp = {2016.06.22}
|
||||||
|
}
|
||||||
|
|
||||||
@Online{dukhan,
|
@Online{dukhan,
|
||||||
Title = {FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2},
|
Title = {FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2},
|
||||||
Author = {Marat Dukhan},
|
Author = {Marat Dukhan},
|
||||||
|
@ -12,6 +42,16 @@
|
||||||
Timestamp = {2016.06.20}
|
Timestamp = {2016.06.20}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@Online{intel2,
|
||||||
|
Title = {Intel Intrinsics Guide},
|
||||||
|
Author = {{Intel}},
|
||||||
|
Url = {https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=madd&expand=2365},
|
||||||
|
Urldate = {2016-06-19},
|
||||||
|
|
||||||
|
Owner = {armin},
|
||||||
|
Timestamp = {2016.06.22}
|
||||||
|
}
|
||||||
|
|
||||||
@Electronic{intel2016,
|
@Electronic{intel2016,
|
||||||
Title = {Intel® 64 and IA-32 Architectures Software Developer’s Manual},
|
Title = {Intel® 64 and IA-32 Architectures Software Developer’s Manual},
|
||||||
Author = {Intel},
|
Author = {Intel},
|
||||||
|
|
Loading…
Reference in a new issue