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hälfte vom roofline report fertig

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This commit is contained in:
Armin Friedl 2016-06-23 02:40:48 +02:00
parent db65a92e20
commit b5a5abf815
15 changed files with 475 additions and 319 deletions
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67
plot/plot.py Normal file
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import pandas as pd
import numpy as np
import matplotlib.pyplot as plt
import matplotlib
from matplotlib.ticker import ScalarFormatter, FormatStrFormatter
matplotlib.style.use('ggplot')
# Roofline Plot
#log x
i = 32
xlbl = []
while i > 1:
xlbl.append("1/"+repr(i))
i //= 2
xlbl.append(repr(i)) #1
i += 1
while i<=64:
xlbl.append(repr(i))
i *= 2
# memory
values = []
bandwidth = 10.6
peak = 86.4
ymem = []
ypeak = []
for i in np.arange(0,64,0.1):
if bandwidth*i < peak:
values.append(bandwidth*i)
else:
values.append(peak)
i=1/32
while i<=64:
if bandwidth*i < peak and bandwidth*i*2 < peak:
ymem.append(bandwidth*i)
ypeak.append(None)
elif bandwidth*i < peak and bandwidth*i*2 > peak:
ypeak.append(peak)
ymem.append(bandwidth*i)
else:
ypeak.append(peak)
ymem.append(None)
i*=2
#plot data
#data = pd.Series(data=values, name='Peak Memory Bandwidth', index=np.arange(0,64,0.1))
data = {'Peak Memory Bandwidth': pd.Series(ymem, index=xlbl), 'Peak Floating-Point Performance': pd.Series(ypeak, index=xlbl)}
df = pd.DataFrame(data)
ax = df.plot()
ax.set_xlabel("Operational Itensity (FLOP/Byte)")
ax.set_ylabel("Attainable GFLOP/s")
ax.set_yscale('log', basey=2)
ax.yaxis.set_major_formatter(FormatStrFormatter('%.0f'))
print(repr(data))
plt.show()

2
roofline/report/inputs/discussion.tex
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@ -1,5 +1,7 @@
According to the definition used the arithmetic intensity is measured by operations per byte. This might not be adequat for haswell processors (and later). Due to the fused multiply-add\footnote{although called multiply-add there are 36 different slightly instructions} extension two floating point operations can be performed with a single instruction. According to the definition used the arithmetic intensity is measured by operations per byte. This might not be adequat for haswell processors (and later). Due to the fused multiply-add\footnote{although called multiply-add there are 36 different slightly instructions} extension two floating point operations can be performed with a single instruction.
- worse results for 4 threads @ NUMA-STREAM not necessarily expected
%%% Local Variables: %%% Local Variables:
%%% mode: latex %%% mode: latex
%%% TeX-master: "../report" %%% TeX-master: "../report"

72
roofline/report/inputs/roofline.tex
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In this section a roofline model~\cite{williams2009} will be created for the Intel\textregistered{} Core\texttrademark{} i5-4210U. In \prettyref{sec:peak} the theoretical floating-point peak performance of the CPU is calculated. \prettyref{sec:memory} then shows memory bandwidth measurements gathered with NUMA-STREAM~\cite{berstrom}. These ingredients are put together into the roofline model which is constructed in \prettyref{sec:model}.
\subsection{Theoretical Peak Performance} \subsection{Theoretical Peak Performance}
The first CPU under test was a Intel\textregistered{} Core\texttrademark{} i5-4210U. \prettyref{tbl:spec-4210} shows the relevant specifications for this processor according to \textcite{ark4210}. \label{sec:peak}
The CPU under test was a Intel\textregistered{} Core\texttrademark{} i5-4210U. \prettyref{tbl:spec-4210} shows the relevant specifications for this processor according to~\textcite{ark4210}.
\begin{table}[h!] \begin{table}[h!]
\centering \centering
\begin{tabular}{ll} \begin{tabular}{ll}
\toprule \toprule
Specification & Value \\ Specification & Value \\
\midrule \midrule
Instruction Set Extension & SSE4.1/4.2, AVX 2.0 \\ \# of Cores & 2 \\
\# of Cores & 2 \\ \# of Threads & 4 \\
Processor Base Frequency & 1.7 GHz \\ Microarchitecture & Haswell \\
Max Turbo Frequency & 2.7 GHz \\ Max Turbo Frequency & 2.7 GHz \\
Microarchitecture & Haswell \\ Processor Base Frequency & 1.7 GHz \\
Instruction Set Extension & SSE 4.1/4.2, AVX 2.0 \\
\bottomrule \bottomrule
\end{tabular} \end{tabular}
\caption{Intel\textregistered{} Core\texttrademark{} i5-4210U processor specifications~\cite{ark4210}} \caption{Relevant processor specifications}
\label{tbl:spec-4210} \label{tbl:spec-4210}
\end{table} \end{table}
The 4th generation Intel Core processors provide FMA\footnote{Fused Multiply Add} and AVX\footnote{Advanced Vector Extension} extensions~\cite[5-2 Vol.1]{intel2016}. An FMA unit is capable of ``[...] 256-bit floating-point instructions to perform computation on According to~\textcite[5-2 Vol.1]{intel2016} the 4th generation Intel Core processors provide FMA (Fused Multiply-Add) units and AVX (Advanced Vector Extension). Whereas AVX can be the main driver for floating-point peak performance, the peak in this case is mainly determined by the FMA unit.
256-bit vectors''~\cite[5-28 Vol.1]{intel2016}. Therefore it can execute 2 (multiply-add) times 4 double-precision floating-point instructions each cycle. This results in 8 DP FLOPs per cycle.
Unfortunately no definite source could be found but according to \textcite{shimpi2012} the Haswell architecture has 2 FMA units, equalling to $2 * 8 = 16$ DP FLOPs per core. Furthermore there are 2 cores in a Core i5 processor. Taken together this results in $16 * 2 = 32$ DP FLOPs per cycle for both cores. In general an FMA unit is capable of multiple floating-point (FP) operations during a single cycle. This is directly backed by the hardware (operations are \emph{``fused''} together). Specifically the FMA unit of a Haswell processor is capable of ``[...] 256-bit floating-point instructions to perform computation on 256-bit vectors''~\cite[5-28 Vol.1]{intel2016}.
At max frequency the processor is therefore capable of a theoretical peak performance of $32*2.7 = 86.4$ GFLOP/s. Since even a DP (double-precision) FP element has only 64-bit, 256-bit would be obviously overprovisioned. But the FMA instructions do not just take scalars as arguments. Instead up to 4 DP FP elements can be packed together in a vector and operations are conducted pairwise. An example mulitply-add instruction is given in \cite{intel2}.
Unfortunately no definite source could be found but according to \textcite{shimpi2012} the Haswell architecture is built with 2 FMA units per core. Taking all together we get:
\begin{enumerate}
\item Two operations are conducted at once (``fused'') and up to four DP FP elements can be packed into the argument vectors. At optimal untilization the FMA unit therefore provides $2*4 = 8 ~\text{DP FLOPs}$ each cycle.
\item Two cores each with two FMAs can then calculate $2 * 2 * 8 = 32 ~\text{DP FLOPs}$
\end{enumerate}
\noindent{}At maximum turbo frequency the processor therefore has a theoretical peak performance of $32*2.7 = 86.4 ~\text{GFLOP/s}$. At base frequency it is capable of $32*1.7 = 54.4 ~\text{GFLOP/s}$.
\subsection{Memory Bandwidth}
\label{sec:memory}
To benchmark the memory bandwidth NUMA-STREAM~\cite{berstrom} was used. The binary ran on a Fedora 23 system with kernel \verb|4.5.7-200.fc23.x86_64 x86_64| in \verb|multi-user.target| to turn off as many distractors as possible. Compilation was done with gcc and the following options: \texttt{-O3 -std=c99 -fopenmp -lnuma -DN=80000000 -DNTIMES=100}.
\printbibliography Again the details of the processor architecture offer a bit of a challenge. The i5-4210U is hyper threaded meaning it provides 4 hardware threads on 2 physical cores. It is not immediately obvious how many threads NUMA-STREAM should be configured with. For this test both configurations\footnote{plus two configurations with 8 and 1 threads respectively for cross checking} were tested and the best one was chosen. The results for NUMA-STREAM configured with two threads are listed in~\prettyref{lst:numa-stream-results}. Prefixes are given in metric scale, i.e. $M = 10^6$ not $2^{20}$.The highest achieved rate was $10608~\text{MB/s}$ with the triad function. The triad function is the most demanding kernel of NUMA-STREAM defined at \cite{bergstrom2} as \lstinline[language=C]|a[j] = b[j]+scalar*c[j]|. All other tested configurations had worse results for all 4 kernels although with at most $300~\text{MB/s}$ difference.
\bigskip
\begin{lstlisting}[caption={NUMA-STREAM results for two threads}, label=lst:numa-stream-results, numbers=none]
Function Rate (MB/s) Avg time Min time Max time
Copy: 9373.3846 0.1368 0.1366 0.1390
Scale: 9414.1304 0.1361 0.1360 0.1381
Add: 10614.6002 0.1812 0.1809 0.1835
Triad: 10607.7910 0.1813 0.1810 0.1834
\end{lstlisting}
\bigskip
\subsection{Graph}
\label{sec:model}
The graph of the roofline model is defined by~\cite{williams2009}:
\begin{verbatim}
Attainable GFLOP/s = Min(Peak FLOP,
Peak Memory Bandwidth*Operational Intensity)
\end{verbatim}
\noindent{}The resulting graph for the values obtained in~\prettyref{sec:peak} and~\prettyref{sec:memory} can be seen in \prettyref{fig:roofline}.
\begin{figure}
\begin{adjustbox}{center}
\includegraphics[width=0.8\linewidth]{res/rooftop}
\end{adjustbox}
\caption{Roofline graph from the values obtained in~\prettyref{sec:peak} and~\prettyref{sec:memory}}
\label{fig:roofline}
\end{figure}
%%% Local Variables: %%% Local Variables:
%%% mode: latex %%% mode: latex

28
roofline/report/report.aux
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@ -25,20 +25,32 @@
\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\select@language{english}} \@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\select@language{english}}
\@writefile{lof}{\defcounter {refsection}{0}\relax }\@writefile{lof}{\select@language{english}} \@writefile{lof}{\defcounter {refsection}{0}\relax }\@writefile{lof}{\select@language{english}}
\@writefile{lot}{\defcounter {refsection}{0}\relax }\@writefile{lot}{\select@language{english}} \@writefile{lot}{\defcounter {refsection}{0}\relax }\@writefile{lot}{\select@language{english}}
\abx@aux@cite{williams2009}
\abx@aux@cite{berstrom}
\abx@aux@cite{ark4210} \abx@aux@cite{ark4210}
\abx@aux@cite{intel2016} \abx@aux@cite{intel2016}
\abx@aux@cite{intel2}
\abx@aux@cite{shimpi2012} \abx@aux@cite{shimpi2012}
\abx@aux@cite{dukhan}
\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {1}Introduction}{2}{section.1}} \@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {1}Introduction}{2}{section.1}}
\newlabel{sec:introduction}{{1}{2}{Introduction}{section.1}{}} \newlabel{sec:introduction}{{1}{2}{Introduction}{section.1}{}}
\@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {2}Roofline Model}{2}{section.2}} \@writefile{toc}{\defcounter {refsection}{0}\relax }\@writefile{toc}{\contentsline {section}{\numberline {2}Roofline Model}{2}{section.2}}
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81
roofline/report/report.bbl
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@ -19,23 +19,42 @@
\refsection{0} \refsection{0}
\sortlist{entry}{nty} \sortlist{entry}{nty}
\entry{dukhan}{online}{} \entry{berstrom}{online}{}
\name{labelname}{1}{}{% \name{labelname}{1}{}{%
{{hash=ed84b6085046bdd016a6224a8de0961a}{Dukhan}{D\bibinitperiod}{Marat}{M\bibinitperiod}{}{}{}{}}% {{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
} }
\name{author}{1}{}{% \name{author}{1}{}{%
{{hash=ed84b6085046bdd016a6224a8de0961a}{Dukhan}{D\bibinitperiod}{Marat}{M\bibinitperiod}{}{}{}{}}% {{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
} }
\strng{namehash}{ed84b6085046bdd016a6224a8de0961a} \strng{namehash}{f138f2b760ef7bf1265cad7357981ef4}
\strng{fullhash}{ed84b6085046bdd016a6224a8de0961a} \strng{fullhash}{f138f2b760ef7bf1265cad7357981ef4}
\field{sortinit}{D} \field{sortinit}{B}
\field{labeltitle}{FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2} \field{labeltitle}{NUMA-STREAM}
\field{title}{FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2} \field{title}{NUMA-STREAM}
\field{urlday}{20} \field{urlday}{20}
\field{urlmonth}{06} \field{urlmonth}{06}
\field{urlyear}{2016} \field{urlyear}{2016}
\verb{url} \verb{url}
\verb http://stackoverflow.com/a/15657772 \verb https://github.com/larsbergstrom/NUMA-STREAM
\endverb
\endentry
\entry{bergstrom2}{online}{}
\name{labelname}{1}{}{%
{{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
}
\name{author}{1}{}{%
{{hash=f138f2b760ef7bf1265cad7357981ef4}{Bergstrom}{B\bibinitperiod}{Lars}{L\bibinitperiod}{}{}{}{}}%
}
\strng{namehash}{f138f2b760ef7bf1265cad7357981ef4}
\strng{fullhash}{f138f2b760ef7bf1265cad7357981ef4}
\field{sortinit}{B}
\field{labeltitle}{stream.c}
\field{title}{stream.c}
\field{urlday}{20}
\field{urlmonth}{06}
\field{urlyear}{2016}
\verb{url}
\verb https://github.com/larsbergstrom/NUMA-STREAM/blob/e5aa9ca4a77623ff6f1c2d5daa7995565b944506/stream.c#L286
\endverb \endverb
\endentry \endentry
\entry{intel2016}{online}{} \entry{intel2016}{online}{}
@ -60,6 +79,25 @@
\verb https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf \verb https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf
\endverb \endverb
\endentry \endentry
\entry{intel2}{online}{}
\name{labelname}{1}{}{%
{{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
}
\name{author}{1}{}{%
{{hash=ff97a9fdede09eaf6e1c8ec9f6a61dd5}{{Intel}}{I\bibinitperiod}{}{}{}{}{}{}}%
}
\strng{namehash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
\strng{fullhash}{ff97a9fdede09eaf6e1c8ec9f6a61dd5}
\field{sortinit}{I}
\field{labeltitle}{Intel Intrinsics Guide}
\field{title}{Intel Intrinsics Guide}
\field{urlday}{19}
\field{urlmonth}{06}
\field{urlyear}{2016}
\verb{url}
\verb https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=madd&expand=2365
\endverb
\endentry
\entry{ark4210}{online}{} \entry{ark4210}{online}{}
\name{labelname}{1}{}{% \name{labelname}{1}{}{%
{{hash=7e5a7615b54a4cc38565e3ac9203a5f7}{{Intel\bibnamedelimb Ark}}{I\bibinitperiod}{}{}{}{}{}{}}% {{hash=7e5a7615b54a4cc38565e3ac9203a5f7}{{Intel\bibnamedelimb Ark}}{I\bibinitperiod}{}{}{}{}{}{}}%
@ -101,6 +139,31 @@
\verb http://www.anandtech.com/show/6355/intels-haswell-architecture/8 \verb http://www.anandtech.com/show/6355/intels-haswell-architecture/8
\endverb \endverb
\endentry \endentry
\entry{williams2009}{article}{}
\name{labelname}{3}{}{%
{{hash=4fb8fbc5c4bfbbc94f80321c3336b71b}{Williams}{W\bibinitperiod}{Samuel}{S\bibinitperiod}{}{}{}{}}%
{{hash=1cdbf6b1b2783ec44ba9770f07e6528f}{Waterman}{W\bibinitperiod}{Andrew}{A\bibinitperiod}{}{}{}{}}%
{{hash=64f58317379ddd1a24e0e6cba85ae78c}{Patterson}{P\bibinitperiod}{David}{D\bibinitperiod}{}{}{}{}}%
}
\name{author}{3}{}{%
{{hash=4fb8fbc5c4bfbbc94f80321c3336b71b}{Williams}{W\bibinitperiod}{Samuel}{S\bibinitperiod}{}{}{}{}}%
{{hash=1cdbf6b1b2783ec44ba9770f07e6528f}{Waterman}{W\bibinitperiod}{Andrew}{A\bibinitperiod}{}{}{}{}}%
{{hash=64f58317379ddd1a24e0e6cba85ae78c}{Patterson}{P\bibinitperiod}{David}{D\bibinitperiod}{}{}{}{}}%
}
\list{publisher}{1}{%
{ACM}%
}
\strng{namehash}{8fbf7ed9bc5abefeb2fdf60a347400ae}
\strng{fullhash}{8fbf7ed9bc5abefeb2fdf60a347400ae}
\field{sortinit}{W}
\field{labeltitle}{Roofline: an insightful visual performance model for multicore architectures}
\field{journaltitle}{Communications of the ACM}
\field{number}{4}
\field{title}{Roofline: an insightful visual performance model for multicore architectures}
\field{volume}{52}
\field{year}{2009}
\field{pages}{65\bibrangedash 76}
\endentry
\endsortlist \endsortlist
\endrefsection \endrefsection
\endinput \endinput

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roofline/report/report.bcf
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@ -1964,15 +1964,19 @@
<bcf:datasource type="file" datatype="bibtex">roofline.bib</bcf:datasource> <bcf:datasource type="file" datatype="bibtex">roofline.bib</bcf:datasource>
</bcf:bibdata> </bcf:bibdata>
<bcf:section number="0"> <bcf:section number="0">
<bcf:citekey order="1">ark4210</bcf:citekey> <bcf:citekey order="1">williams2009</bcf:citekey>
<bcf:citekey order="2">ark4210</bcf:citekey> <bcf:citekey order="2">berstrom</bcf:citekey>
<bcf:citekey order="3">ark4210</bcf:citekey> <bcf:citekey order="3">ark4210</bcf:citekey>
<bcf:citekey order="4">ark4210</bcf:citekey> <bcf:citekey order="4">ark4210</bcf:citekey>
<bcf:citekey order="5">intel2016</bcf:citekey> <bcf:citekey order="5">intel2016</bcf:citekey>
<bcf:citekey order="6">intel2016</bcf:citekey> <bcf:citekey order="6">intel2016</bcf:citekey>
<bcf:citekey order="7">shimpi2012</bcf:citekey> <bcf:citekey order="7">intel2016</bcf:citekey>
<bcf:citekey order="8">shimpi2012</bcf:citekey> <bcf:citekey order="8">intel2</bcf:citekey>
<bcf:citekey order="9">dukhan</bcf:citekey> <bcf:citekey order="9">shimpi2012</bcf:citekey>
<bcf:citekey order="10">shimpi2012</bcf:citekey>
<bcf:citekey order="11">berstrom</bcf:citekey>
<bcf:citekey order="12">bergstrom2</bcf:citekey>
<bcf:citekey order="13">williams2009</bcf:citekey>
</bcf:section> </bcf:section>
<bcf:sortlist section="0" type="entry" label="nty"> <bcf:sortlist section="0" type="entry" label="nty">
<bcf:sorting> <bcf:sorting>

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[181] Biber.pm:2949> INFO - No sort tailoring available for locale 'en_US.UTF-8' [236] Biber.pm:2949> INFO - No sort tailoring available for locale 'en_US.UTF-8'
[187] bbl.pm:482> INFO - Writing 'report.bbl' with encoding 'UTF-8' [252] bbl.pm:482> INFO - Writing 'report.bbl' with encoding 'UTF-8'
[188] bbl.pm:555> INFO - Output to report.bbl [254] bbl.pm:555> INFO - Output to report.bbl

142
roofline/report/report.fdb_latexmk
View file

@ -1,77 +1,75 @@
# Fdb version 3 # Fdb version 3
["biber report"] 1466377836 "report.bcf" "report.bbl" "report" 1466377839 ["biber report"] 1466641538 "report.bcf" "report.bbl" "report" 1466642333
"report.bcf" 1466377839 91927 8441b95c5df3dfabb183983196bd68cc "" "report.bcf" 1466642333 92144 b16bb4d23ff7f0d4a3e0ee2f3a7b2c36 ""
"roofline.bib" 1466377808 2297 eb4499b8cbde3786ecb1b7d71d0798ba "" "roofline.bib" 1466632630 3723 5c74ca6da23b4936d86117884f95cb33 ""
(generated) (generated)
"report.bbl" "report.bbl"
"report.blg" "report.blg"
["pdflatex"] 1466377837 "report.tex" "report.pdf" "report" 1466377839 ["pdflatex"] 1466642332 "report.tex" "report.pdf" "report" 1466642333
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roofline/report/report.fls
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% Encoding: UTF-8 % Encoding: UTF-8
@Online{bergstrom2,
Title = {stream.c},
Author = {Lars Bergstrom},
Url = {https://github.com/larsbergstrom/NUMA-STREAM/blob/e5aa9ca4a77623ff6f1c2d5daa7995565b944506/stream.c#L286},
Urldate = {2016-06-20},
Owner = {armin},
Timestamp = {2016.06.22}
}
@Online{bergstrom3,
Title = {stream.c},
Author = {Lars Bergstrom},
Url = {https://github.com/larsbergstrom/NUMA-STREAM/blob/e5aa9ca4a77623ff6f1c2d5daa7995565b944506/stream.c#L307},
Urldate = {2016-06-20},
Owner = {armin},
Timestamp = {2016.06.22}
}
@Online{berstrom,
Title = {NUMA-STREAM},
Author = {Lars Bergstrom},
Url = {https://github.com/larsbergstrom/NUMA-STREAM},
Urldate = {2016-06-20},
Owner = {armin},
Timestamp = {2016.06.22}
}
@Online{dukhan, @Online{dukhan,
Title = {FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2}, Title = {FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2},
Author = {Marat Dukhan}, Author = {Marat Dukhan},
@ -12,6 +42,16 @@
Timestamp = {2016.06.20} Timestamp = {2016.06.20}
} }
@Online{intel2,
Title = {Intel Intrinsics Guide},
Author = {{Intel}},
Url = {https://software.intel.com/sites/landingpage/IntrinsicsGuide/#techs=AVX2,FMA&text=madd&expand=2365},
Urldate = {2016-06-19},
Owner = {armin},
Timestamp = {2016.06.22}
}
@Electronic{intel2016, @Electronic{intel2016,
Title = {Intel® 64 and IA-32 Architectures Software Developer’s Manual}, Title = {Intel® 64 and IA-32 Architectures Software Developer’s Manual},
Author = {Intel}, Author = {Intel},